SpinalHDL
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Leaderboard
| # | User | Language | Latency▼ ns | Max Frequency MHz | Area μm² | |
|---|---|---|---|---|---|---|
| 1 | SolowYolow | VHDL | 62.05 (1 cycles) | 16.12 | 11495 | |
| 2 | Vegard Eriksen | Amaranth | 89.54 (1 cycles) | 11.17 | 22138 | |
| 3 | nbstrong | VHDL | 141.14 (18 cycles) | 127.53 | 7301 | |
| 4 | Ivan Buda Mandura | Verilog | 178.94 (18 cycles) | 100.59 | 10528 | |
| 5 | Steve Hoover | TL-Verilog | 183.11 (17 cycles) | 92.84 | 8494 | |
| 6 | sam-shahrestani | Verilog | 324.92 (19 cycles) | 58.48 | 15357 | |
| 7 | L-Sherry | Amaranth | 410.06 (17 cycles) | 41.46 | 12964 | |
| 8 | knapheide | SpinalHDL | 272128.61 (14246 cycles) | 52.35 | 28005 |
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